foreign
[Music]
have a good lunch
good so let's start the talk so the next
speaker will be
um
Jeremy Kurt thank you yep
um we'll be talking he'll be talking a
Libra BMC literally everything is open
so Jeremy Kurt is the Linux and open
source system developer
working on the Kernel drivers firmware
and relate related Plumbing today Jeremy
will be describing the completely open
baseball management control system Libra
BMC so welcome Jeremy thank you very
much
[Applause]
thanks everyone welcome
um firstly I would like to acknowledge
the traditional owners of now the Warren
jury we were on people of the cooler
Nation
um as maybe indicated my pronunciation I
am a visitor on this country
um I'm from the uh the country over in
Perth and a lot of this work was done on
that country there I would like to uh to
share my respect for elders past and
presence
uh by way of my intro uh my name is
Jeremy I um I run a little uh
open source embedded uh systems
programming consultancy called code
construct I'm very proud to sponsor
everything open this year
um
and before we get into the kind of
technical bits a couple of couple of
credits and or disclaimers
um firstly this what I'm presenting
today is built on a lot of a lot of
existing code that's it's written by
people that are much smarter than I am
um some of those folks are in the room
today so I'm going to warn you there's
going to be some oversimplifications as
well in in the talk
what we've done essentially is kind of
taken a lot of that that that work from
these clever people and kind of glued it
together done a bit of bring up and done
a few fixes and build something that we
can actually talk about at a conference
this work is definitely a big
collaboration between code constructs
the open power Foundation which Hugh
mentioned earlier in skinneret and uh
and IBM as well so thanks for that
thanks for those folks for for
participating
so what are we doing here uh our general
plan is is a two-step thing we're going
to get a server we're going to take out
its BMC and we're going to put a more
open sourcing BMC into it uh that's my
talk thanks all
um no what's a BMC uh so BMC is a a
acronym for a baseboard uh management
controller and essentially the
management controller that's responsible
for managing and booting and to those
extent sort of controlling uh a server
and a data center so uh things like
being able to remotely turn on and off a
computer being able to inspect its
inventory while the the main part of the
computer itself is off being able to get
a console on it all the sort of the
remote things that are sort of side side
bands to the the main computer itself
the The BMC is responsible for
while we're looking at open source BMC
uh essentially
there's a it's a lot of um
a lot of side channels involved here uh
and having a a some mysterious computer
that's talking to your actual computer
um can be a bit of a risk so back at
um
LCA in 2021 I presented a bit about kind
of what we're doing in The BMC space and
it included these two slides um
on the left a bit of a system diagram
about what uh what the host might be
able to do
accessing sort of parts of the BMC over
over one of the buses between those two
devices
um
there was a cve
um recorded uh 6260.
um it's not not a huge issue and for
most
applications where we're using a server
with a BMC it's it's kind of not a
problem but it it can be depending on
your trust model of how you're using a
server who has access to the BMC who has
access to the host and if there's need
to be separate
so I while it's not a serious problem
it's a kind of demonstration of some
some potential issues in that
pretty much every every server kind of
2019
and earlier had had this potential issue
um and it's exposed by essentially the
the fixed piece of silicon that is The
BMC and how it operates how it interacts
with everything else in the system
um but instead what we're going to do
here is is apply kind of the concept of
an open ecosystem and open sourcing
everything into making that BMC part
um a bit more uh verifiable a bit more
trustable a bit more modifiable because
we're either writing the source
ourselves or we're using bits that we
can inspect and trust and modify
so in doing that we're going to start
kind of going to go up the stack
starting from Hardware
and of course we're going to start with
open Hardware we're going for an open
approach to everything here starting the
hardware
and I guess for extra credit here we're
going for not just the BMC but also some
elements of the the host server as well
um
what we're going to doing is we're not
getting room from the entire thing we're
doing a BMC bring up against existing
host server sorry host server Hardware
and we want to choose a platform that
that we can actually inspect a bit and
do our bring up without having to do too
much reverse engineering so we've got to
choose a platform as a Target and uh as
was mentioned in in Hughes keynote this
morning open power platforms are a
pretty good choice for that
um the the repo here contains
essentially all of the firmware that's
running on an open Tower server so we
can look at it we can inspect it we can
write the the bits to talk to it without
having to sort of make too many
assumptions about things
and that that's going to be
exceptionally helpful for our bring out
for sort of reasons I'm going to talk
about later being open source we're not
going to modify it we're still going to
use it as a reference for our for our
BMC work here
so we've kind of chosen open power as a
base for this
for that that's more of an ecosystem
what we need is a specific platform
back in uh June 2018 uh this system here
the uh the IBM
Oak Ridge Summit supercomputer was
announced as the the highest performing
supercomputer
um of the time according to the the top
500 list
and it's composed of about 4 600 of
these these individual nodes all
networked together
and those individual compute compute
nodes have this catchy name the ac922
and that's what we're going to choose
for our our bring up project here so
we're going to get one of these servers
take out the BMC and put our new open
source cbmc unit
this is a
the insides of one of those machines uh
it's a two socket 128 threads uh two
rack unit device uh here we've got a lot
of empty space uh there's there's
carriers for a lot of honking gpus in
there it's definitely a production
server it was was part of the fastest
computer in the world in the world for a
while definitely a high performance
service so we're not kind of just doing
a toy bring up project this is this is a
series better kit
full one out of production effectively
I I borrowed it it's uh yeah it we will
send it back at some point yeah the Oak
Ridge is not missing one of the nodes
it's all right
um
as well as well as having I guess an
important design point about these
platform is as well as having a fairly
open architecture and open design
um
the The BMC itself is socketed so that's
going to be pretty handy for us if we
look at a kind of a ga x86 motherboard
this is a so this is a server board here
kind of similar uh two sockets items for
a socket it's about the same sort of
generation as our ac922 but it doesn't
have those space for the six gpus
doesn't really matter for this
um but if we look at the bottom uh
bottom you're left of that we've got
this little space here and that that
circle thing is The BMC now I'm pretty
handy with a chisel but I don't think I
could get that off without ruining the
entire thing
um so these hardware folks are going to
see that this is not something we can
just take it off and and replace it with
a new one whereas on our at our 922 this
is The BMC that that's shipped with the
machine so as you can see here it's on a
separate board we can we can unplug that
and put our new thing on it so that's
got a much better chance of success
modifying this platform than than an
early one
uh just going so this he said existing
BMC that's that's what we're trying to
replace here
so reviewing our progress so far we have
a server uh I'm going to kind of build
on this the project managers in the
audience are going to love these slides
we kind of build up as we go
um so we have a server we have a server
we can do a bit of experimentation on um
due to the open nature of the stack and
the platform and the the implementation
uh we can remove the BMC but of course
we're going to want to add a new one to
that we can't just operate this thing
without a BMC
so before we kind of go into that a bit
of a digression into a bit of a
technology that's happening at the
moment called dcscm or dcsci a couple of
acronyms they're going to help us with
our with our project here
um
the clever Folks at the open compute
project have published the standards
um kind of heavily that the authors here
are essentially Microsoft and Google
um under a I guess an effort to make
their own systems production more
modular so by producing a spec about
what a BMC should look like and how it
connects into the system that's right as
an effort to possibly use new parts make
make a a system out of more modular
components
and and
kind of having a standard rather than
having to do everything from scratch for
every platform so that that gives us a
bit of a standard form factor for a BMC
and a standard connector
um the architecture of of that um that
standard so there's two parts there the
dcscm is the module itself so The BMC
module which has a size and a connector
and filling the dcsci is the connector
definition
um so the intention here is they have
your BMC you have all of these signaling
go through this this DC SCI connector
going to all of the bits that it's
managing so your peripherals your board
your high CPU and it's doing all of its
temperature management CPU boot all that
kind of thing over this one connector
um this is what the connector looks like
um again if you're sort of following the
hardware side of things you might
recognize this from connectors such as
the
[Music]
the SSS
ffta1002 which is a oh my buttons came
back
or a little happening at once
anyway
it is the protocol agnostic multi-lane
high-speed connector
and when they say multi-lane they are
not messing around
so this is what's carried over that
connector and this is essentially the
stuff you need to to implement a BMC so
all sorts of different signaling some of
which is used on some platforms some
won't be using some platforms
um and that
basically gives us a standard form
factor to connect these kind of things
into into the base platform and do all
our servery bits
so specs are all great this is DCM dcsci
but we need an actual implementation and
on our open source tilt here we want an
open implementation
and this is one of them so this is a
board
produced by a manufacturer called Ant
micro they've designed and produced this
board
called a dcsem board
it is this dcsci connector down the
bottom there
um
basically with all those lines going
into an fpga
um it has some on-board Ram so we've got
500 512 megabytes of ram we have a
network connector at the top we have a
little bit of storage and some emmc
device there and we have all the little
bits required to to manage an fpga so we
have a programming interface we have
some USB in which we can interact with
that fpga
and of course everything's open here so
these are the schematics of that board
if you can find the bug there I'm very
impressed and where were you five months
ago
um
so again big thing is the the hardware
is open the Hardware's out there we can
see it we can investigate it we can
potentially modify it and do our own
thing if we want we're sort of not quite
in that that business at the moment but
whether that's again that the advantages
of having things open for us are pretty
huge in this case
uh the the source as I said is online
this is the repo for that device you can
open pull requests you can do all sorts
of things uh just I guess like coming
from a software world it's kind of cool
to see that we can we can have those
kind of designs out there and usable for
for this so back to our list we have a
server and we have potentially a BMC
Hardware I say potentially we'll get
back to that in a bit
um
another another aspect I guess about our
ac9227 going back to that original photo
the top right here is where that BMC
usually goes and we can zoom into that
area and we find one of these friendly
connectors
um basically a massive pin grid with all
the BMC signaling to that and again the
astute hardware folks in the audience
might have noticed that that is not that
um so we have a bit of a problem here
fortunately someone has already solved
it for us
um there is one more piece of Hardware
again an open piece of Hardware which is
this little guy so
Big Board uh it's not that big kind of
this week uh with one of those dcsci
connectors and that massive pin grid on
the bottom and that routes kind of
between what the the ac922 server
expects in terms of signaling and the DC
SCI on the other side now it's not
entirely one to one there's some signals
that exist on one connector that don't
exist in the other but we can kind of we
can get around that
um and this allows us to
do this so this is our same ac922 again
into poser and green at the bottom and
that that dcscm board on top
so now we have a server actually
connected to
our potentially a BMC Hardware now I did
say I would go back to that potentially
aspect
um
in
if you're producing A system that uses a
dcscm and or I guess any any BMC based
systems you're going to have
some specialized Hardware here so this
is essentially what we would need to
implement a dcscm module we've got our
BMC with all of these kind of different
signaling lines going out to our dcsci
connector and some some on-board
Hardware that's relevant to the BMC
itself The BMC needs to talk over the
network for example it needs some
storage so there's some
um
some specialized Hardware on the device
there's a couple of vendors that
actually make one of these system on
chip designs
um
there is I guess two industry leaders
that basically own the entire Market of
what's on a BMC in any server that you
buy now and they they produce
essentially a little device has a little
arm core on it and and all of the kind
of the bits of Hardware that you need
out of a BMC to talk things like i2c FSI
LPC all the the interfaces to the rest
of the system so those already exist in
Silicon what we're doing is replacing it
so we kind of need to re-implement not
reinpoint we need to design something
that works like this however what we
have at the moment with that dcscm board
is just an fpga right and all it has is
IOS there's just lines going from the
dcsui connector into unassigned iOS on
the fpga there's nothing about this that
makes it a BMC at this point
um
and I guess more obviously we on a BMC
we have an actual CPU core on it right
we have an arm core on it we don't have
that on rfpga we just got a a whole
bunch of um like 75 000 uh logic units
that we can turn into something we
haven't turned anything in it turned it
into anything yet
so
um existing about an arm core at the
moment this is our Blank Slate to mess
with we've got iOS no core nothing
um so it has turned me the bits that
turn that blank slate into some kind of
BMC and for those kind of not familiar
with the the fpga world we'll refer to
that as Gateway
or it's not quite software not quite
Hardware but we we can write some some
code that will return into the fpga bit
stream that turns this thing into a
usable device
um so that's the Gateway itself is the
very log of the vhdl whatever we compile
into the the bits room defines the
behavior of that device to do BMC like
things
now of course this is an open source
conference so I want some open gateway
to do that
um it's actually a a massively
increasing amount of open Gateway around
there's lots of resources about bits
that we can reuse reapply into into our
Blank Slate
um and using a whole bunch of different
development development models to do
that some folks have written raw vhdl
raw verilog some have written gen like
schemes to generate that verilog out of
high-level languages
I'm going to go into that a bit uh maybe
offline but there's certainly ways we
can we take open source bits of code to
generate behaviors for our our Blank
Slate of an fpga
so going through that first up we do
need a CPU and um
I can highly recommend this one so
there's a basically a
an open source CPU core called micro
this really deserves its own talk as a
massive amount of cool stuff in there
it's a fully open open power instruction
set architecture core
it's just missing a couple of things and
another like the vector like that 128
bit wide registers and rigid
instructions we don't need those at all
for our BMC we're not trying to produce
a high performance computer on our BMC
this is kind of
the server itself is the high
performance computer here
um this is the microwave can be
synthesized for lattice and Xanax fpgs
you can also run in Sim but what it
gives us essentially is a way to to drop
a very usable core onto our fpga device
and have some sort of compute capacity
behind that
and super importantly the Linux port for
this has already done for us so we could
drop a microwave core there and have
Linux boot on that core with with fairly
minimal effort so that's that's going to
be our CPU corfids project
we also need we've got a CPU we need
some Ram so we need a dram controller
um from that we're borrowing some code
from the latex project so latex uh
library of of
um of fpga components
um one of which is the dram controller
we can kind of that's already plugged
into the microwave call for us so that's
that's super
uh we also have an Ethernet device on
rfpga we'll also grab some some uh the
the light Heath module that can also be
plugged into microwave uh this is a
quite a simple ethernet device uh which
which already has this Linux support
we're not again we're not going for
super high performance networking here
but it's enough to to communicate with
our without microaught CPU
uh we need some storage you know to load
our kernel and root file system like
it's from
all the kind of BMC Software comes from
our eme MMC device
and in order to talk to an EMC device we
need an EMC controller and for that
we're using more lightx code the uh the
light SD project
um
it has some Linux support uh
what we can see here we've got an SD
card type controller we're talking to an
EMC device so we needed to do a bit of
um uh work unless that was Matt in the
audience here uh making that compatible
with an EMC device and the Linux drivers
that talk to it to actually support emmc
but once we kind of sorted out we just
have the the Linux emmc storage layer
talking to this controller talking to
the the EMC Hardware on the board itself
cool
and of course one of my favorite things
we have a uart
um it's from the open course project it
just comes as a vhdl
um
it's a standard 16 550 uart so of course
it has Linux support uh one of the most
common bits of Hardware so that at this
point that gives us our CPU call we've
got Ram we've got Network we've got
um
a uh
uh storage got a Serial console all that
kind of stuff so it's at this point
we're kind of we've got our server we've
connected to uh our basic SOC so but
it's not quite Hardware we're kind of
Gateway and and and Hardware distinction
is a bit blur at this point but we do
have our our little chip we can run
codon at that point
now back to our diagram earlier
um this is what we're trying to make
um at one point we've kind of covered
the left we still don't have any of
these bits on the right here would
actually make it a BMC and they're kind
of the interesting things for for what
we're doing here is producing a BMC that
can control the server
so we're still missing the dedicated
hardware for like the LPC and the FSI
and the ITC
um
so we want to turn our SLC into
something useful
um so I grabbed a few other bits uh one
of them being produced by
um some folks at IBM under the open
power Foundation project which is a
essentially an LPC controller which
which is our main
pretty important bus to be talking
between The BMC and the the server
mainly because it's used for the
firmware transfer so when the when the
server boots it needs to request its
bile its low level firmware over LPC
from
from The BMC so it's pretty critical we
have this working
um
the in our in our architecture here The
BMC is the LPC device and the host CPUs
of the LPC controller so trying to do
this in software is a bit tricky hence
having actual dedicated bit of hardware
on rfpga to do that is pretty essential
for that so it gives us our firmware
load it gives us a bit of a Channel of
communication between the The BMC and
the the host in things like ipmi and and
console host console as well so we're
using the LPC peripheral for that
we also have in the micro what
definition itself there is a GPO
controller so that allows us to do all
of the the kind of off to the side bits
of implementing a server things like the
power button that's basically just a
gpio that goes from from the button
itself to The BMC that tells it to start
booting the server so GPO is for that
the microwave code already had those
present we just needed to add some some
interrupt support for that it's pretty
critical that we we have GPS state
change is actually interpreting the CPU
rather than polling for that so the iiq
support that was all Uma you did the
we now have the the gpos that support
um things like our LEDs our fan presence
all those bits there
so going back to what we have so far
this is our the system we've built out
of those those bits
um we're starting now to look a bit more
like a BMC you know we have we have our
core we are Ram we have our bits
um Don't Laugh at My 100 megahertz
computer it's uh it's pretty good we'll
see how we go
um
but we are missing a couple of devices
that I I did mention earlier on uh and
they're the i2c and the FSI bosses
gonna get to that
um so i2c uh is used heavily on on BMC
systems a lot of like the temperature
sensors a lot of fans all those kind of
bits uh even gpro expanders so like more
gpus behind an ITC bus implemented using
an i2c connection between The BMC
and we also have this FSI bus Which good
question uh is
what does it stand for this week the
free support interface or field service
anyway whatever it's called this week
it's an IBM design
um it's uh it's required it's a bus
between
The BMC and the processes that
implements kind of the really like the
early firmware load early or low level
control of of the the units inside a CPU
there's
gross of oversimplification but it's but
it's our way our magic way of talking to
the CPU essentially and doing some
really early early brute processes on
the on the CPU there's also a few
monitoring applications that happen over
FSI uh I think we have access to the uh
the on-chip control sort of thermal
management over SSI in some cases
um
so we haven't implemented these in
Gateway but fortunately
um in Linux we have a couple of drivers
that are handy for us here we can take a
couple of gpios and use them for i2c
just by manually toggling or reading
those those gpos for FSI we have a
back-end driver for the FSI bus that
does the same thing we can we can just
twiddle the gpos and get proper FSI
transactions uh
working over essentially a raw GPA
device
um
yeah yeah good yeah exactly so these are
used in production we're not just
hacking things around here we are
introducing a bit of technical debt and
um unlike all technical debt
it's true like all technical debt we're
going to kick that can down the road for
a few slides time
so what do we have we've got
our fpga this is looking like our
earlier diagram we've got all these
signaling happening in actual bits of um
Hardware uh that allows us to implement
things like a BMC and we have our our
sort of peripherals like IO MMC dram all
those kind of bits are now implemented
on our on our little device here
so back to our slide we have a server
connected to an actual BMC
good stuff
so we have Hardware right we have our
Hardware sorted out it's not doing
anything yet it's not I mean we've got
the hardware plus The BMC we don't have
a being a BMC
so of course we need some open software
um
I guess going back a few levels
Linux already exists on microwatt that's
not something we've done
um Linux already exists on as a BMC in
an open BMC space so I'll bring up Focus
here is
bringing up this dcscm board with the
hardware that we've just produced in
Gateway and for doing that we have all
manner of Open Source software which I'm
sure you're sort of already familiar
with
and here's kind of I guess our story of
how we're bringing that up
so of course we need a Bootloader for
that we used industry standard ubert
um the uh
uh the the ports I think it's Upstream
of Hubert already supports the micro
Rock core we just needed to add a few
like a platform definition
and some bits for reading you know boot
payloads off EMC and all that sort of
thing so the micro reports already there
already has the ethernet controller
already has
um you know all out a lot of bits there
we just need to define the dcscm
platform for u-boot so we know which
Hardware is out there what can what can
what it can interact with to actually
start our bootloader on our and our new
bit of hardware
that work is was about 32 patches
patches worth on the sort of the
mainline new boot tree so not a whole
lot but just our our platform
definitions um getting that going
once we have a bootloader we want to
actually Boot something
and in our case that is
suspense
Linux
um again Linux already boots on
microwots already have the core covered
we just needed to add some of the the
drivers for our BMC peripherals the
actual
um the platform definition again it's
kind of similar to the efforts we did in
new boot kind of replace with production
Linux drivers for this
um so we have about 37 patches in total
for the Linux Port of our dcscm board
um and and nothing too controversial
there just again some device trees some
some bits of driver plumbing and that
sort of thing
so we've got our OS layer
um
we have our server connected to our
actual BMC and now we're building Linux
and of course
it's a booty Linux on something we'll
Benchmark it right
so back to our 100 megahertz computer
um on our
the numbers in the kind of the the
fourth row are the benchmarks from the
existing BMC on that server which is our
arm core running at 800 megahertz the
arrows indicate whether higher numbers
are better or worse and our relative
column on the the right gives us where
one is equivalent numbers are higher
than one are where the micro right core
is doing better numbers below one is
where we're not quite there so I cut a
percentage of of what's in the current
production machine
uh and this is pretty cool
um we're we're running an fpga call
running 100 megahertz
um we're doing better in some benchmarks
um which is kind of cool uh we're doing
absolutely awfully on our Snell Cisco
Benchmark
um
and my theory on this is that that we're
missing out on some optimization
required for the null Sysco but we can
we can ignore that for now turns out it
wasn't wasn't super important but so we
have decent
um kind of IPC type performance open BMC
which is our BMC payload we'll get into
that later uh is very heavy on IPC so
that's kind of the things we're focusing
on so our message passing uh benchmarks
pretty good
um we have some excellent speed in in
memory access which is also great
um
the network performance at about 62 is
not fantastic but it's not super
critical and we're doing a huge amount
of data transfer over the network to our
BMC
uh
we have a few artificial benchmarks just
the boot time of an open BMC system
um which are about parody on
um but we did have quite a cut down
system at that point
uh and open BMC being pretty heavy on
the IPC uses debuss a lot for its
internal communication
and we're kind of a bit this is that
this is my concerning line here our 37
performance on on dbos
um
everything else is kind of cool we've
got we've got Network we've got flash
we've got system call behavior on our
micro rut core running at 1 8 of the
clock speed of the thing we're replacing
so that was pretty cool
um as part of the project we kind of um
we did this about Midway through to
figure out whether we should keep going
or not
um and and this this was quite
encouraging I was I guess you know ready
to uh we can't do it but you know this
table was was kind of Handy to provide a
bit of encouragement
so um using using a bit of this data we
continued along
uh for some work on open BMC so this is
um
uh a open implementation of a BMC but
nothing new here the the existing ac922
BMC already supports open BMC the code's
all Upstream we don't need to worry too
much about that side of things
what we do need to do is provide the
platform definition that boots open BMC
on our new bit of dcscm Hardware
um so
I think every Upstream open BMC platform
is currently on the arm architecture
we had to have a um
uh a power support for that now given
our micro core as a power architecture
it's not an armed device so we had to do
the um
the the bits required to make a power
based open BMC system like I said
platform definition
a little a couple of patches the tool
chain to allow it to support the the
micro Watts architecture because we're
missing those Vector registers we have
to uh patch the tool chain very slightly
to do that
but also trimmed down open BMC a little
um removing a few of the servers because
we're at such a small CPU in this case
removing some of the services that we're
certainly not going to need like some of
the debug support we can we can pull out
so that we have something that's
actually going to boot and you know
provide some decent performance on 100
megahertz CPU
that that base support of getting
just kind of the the open BMC system
itself booting was about 19 patches
um and that's that's kind of getting the
thing burning to Shell not talking to
the hostess yet but getting an open BMC
user space all all booted at that stage
so we're reviewing our progress here we
have a server connected to an actual BMC
it's booting Linux and it's running
actual BMC Software at this point which
is kind of cool
um we're at the point where we can
actually access the web page exported by
our fpga BMC this is the standard open
BMC UI it already existed we're not
doing any of this so this is just
um the the standard open BMC Software
running on the port of our dcscm fpga
Hardware
um so this is the the default page you
get when you visit it
um the 100 megahertziness is is
definitely showing this point the web
page takes is not quite as Snappy as you
expect for for one of these things but
it's it's usable tolerable we're still
missing a lot of things we don't have
any inventory data populated on the
system we're not pulling much out from
the uh from the core but at least we
have our web page here we can do some
basic things on that including
uh checking out some of the sensors so
this was without doing much on the host
bring up side we already have our BMC
definition for the ac922 we just ported
it and we kind of have all our our
sensors listed ready to go
so we've got essentially our BMC running
but not talking to much at the moment so
the next phase of bring up
is getting it communicating with our
open power so our open power BMC
communicating with our open power
server itself
um again important aspect of that is the
firmware for an open power machine is
all open we can refer to it we can refer
the documentation we can see the bits
that are out there when we're doing our
our BMC bring up now like I said the the
platform support is already there we're
just doing the the dcscme parts of that
and that meant that we can you know we
have access to the code we can modify it
we can change the platform definitions
to suit our new BMC device
um so what we're doing here is taking
our open power port uh sorry open power
board applying that to our new open BMC
platform now it's already a thing so the
The ac922 BMC like I said before is is
is a Upstream device what we're doing
here is our all of our lots of platform
definition bits that get it running on
microaught plus The BMC Hardware plus
all that using the existing ac922 BMC
definitions
um unfortunately it's kind of not that
modular on the hardware there's a lot of
um
coded I hard-coded things about paths
and SFS for where you find your your
temperature sensors and that sort of
thing which was not not great there's
some awful hacks in in our Port
um we had to fake up a few gpos where
they didn't exist through that connector
for example
um we had to extend a few timeouts we're
running you know pretty slow so we had
to stretch a few limits there
um
the I guess our
the talking between the two machines
support was about nine patches to open
BMC in total
um
it's not a lot I guess um and the major
factor in that is that we're starting
with an open base on the server side and
an open base on the uh the open BMC side
um one of the cool things is now we're
dealing with everything open
um we've got our open Hardware we can
look at
um I guess it's like any sort of
standard bring up project where the key
difference is that if you find a bug in
the hardware the hardware folks don't
just tell you to get bent uh we can
actually work on fixing that and in one
case we found an issue from our original
schematic
um where there was apparently hardware
folks don't do off by ones that have
like twos we had some of the signals
routed a little incorrectly we can file
a bug and about two weeks later the app
micro folks who ends repo had fixed in
their designs now of course
um
fixing their designs is great but we
still have our physical piece of
Hardware which is not fixed so we had to
do some some rewiring and doing sort of
thing but again since we can see the
schematic we can see the board layouts
we can we can do those sorts of fixes
without having too much involvement with
with the the Upstream folks if necessary
so once fixing all of these once kind of
doing some some little bits of Gateway
rewrites uh we actually had
our BMC ready to go
we can go to our page on The BMC web
interface and click the the power on
button
um now after an extraordinarily long
amount of time
we get this uh so this is on our on your
left hand side we have the console and
the server itself on our right hand side
we have a console of The BMC just a
little comparison on this side we have
our
just just the top of the CPU information
file uh our power9 CPUs of which we have
128
on the right hand side we have our
little that's the entire CPU info on our
BMC but the really cool thing is that
now we've got the same architecture
across both of these both open power
machines one supercomputer one tiny
computer
uh
so kind of tracking our thing here we've
got our server it's connected to through
that interposer the actual BMC BMC is
booting Linux BMC is running BMC
Software and
it can boot the server and even better
it can boot the server running and
entirely open source firmware OS there's
nothing in the the stack here that's the
closed source
thank you
anytime you just yet I did say literally
everything is open there's one component
one one little thing which is the the
tool chain required to compile a Gateway
for that particular fpga is not yet open
uh there are other fpgas that have uh
support in the open source uh uh tool
chain and there's also some effort in in
adding the xilinx uh
support into the existing uh placement
route
tools so that's kind of I guess a bit of
a bit of prospect of the future so yes
yeah
um a couple of a couple of not so great
things
um
it's a little slow we are running on 100
megahertz computer here um
interestingly uh we did kick that
technical debt down to this slide in
which we have about 30 to 50 percent of
our CPU usage is in just doing the i2c
and the FSI so just twiddling those gpos
is costing us a lot of time which is
kind of good news in that it's it's a
fairly linear fix to get some Gateway
now for the ITC bits and the FSI Brits
as well to reduce our CPU load by 32 so
that's kind of cool so that's our that's
our
kind of thing there it was a pretty
quick bring out project so we weren't
going through and doing a lot of
Polished Work um at least I wasn't
um
so there's a bit of kind of edges that
we can clean up and and
sort of a bit of Polish we can put on it
but it's certainly we've shown that it's
feasible
um we showed that some some low-hanging
fruit that we can work on to fix uh and
we have our entirely open stack
um again just reviewing what we've got
here we've got our core iOS everything
open source
cool
I just got it
yes yeah I'll take some questions uh
as times running up maybe just one
question
sorry I've got some bad news for you uh
any plans for incorporating
um uh some kind of video input so you
can have that on the console or is that
not not enough pins on the fpga
certainly there is enough pins
um
it's my concern with that is the amount
of gate where the amount of fpga usage
required to re-encode a video signal
there's a few
the weather's done on on um
on The BMC that's already there is that
there's a PCI device which is a video
card on The BMC itself which can either
output to a physical video connector or
it can re-encode that back into
something you can stream over the
network
um that's going to going to take a lot
of Lut usage to to get to that point
um and I guess I guess the focus on the
video encoding side would certainly have
a better idea of how much is used about
are we
uh yeah my my worst I love the uarts not
so much the video output
um but uh yeah I think I think it's a
pretty commonly used sort of usage model
in getting the video shared over the
network from there but um yeah it
certainly don't have them implemented
but again open source is certainly scope
to grab some some uh some vhdl that
implements a video device and kind of
wrangling that into the into the thing
we might be struggling with encoding
that over the network at 100 megahertz
um but you know if there's there's
clever Hardware Engineers around it
could kind of handle all of this in in
the Gateway itself which could be cool
awesome yes
he's ready for the mic
okay we'll chat afterwards awesome I'll
be around uh for the entire conference
I'm happy to chat happy to geek out
about any of the bits here
um
but uh here's our resources uh a lot of
these are on so the main link here is
kind of a basically a text description
of this talk
um with a few extra side tales about
bring up problems
um
and the rest of the resources are also
linked from that page
and thank you very much
[Applause]